FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6356 Discussions

do we have 10ge with 1GE/10GE multi-rate ethernet phy example design

BQi
Beginner
486 Views

what we need is the MAC+PHY whole ref design

0 Kudos
6 Replies
BQi
Beginner
432 Views

10GE(1GE/10GE MAC) and 1GE/10GE multi-rate ethernet phy example design

0 Kudos
BQi
Beginner
432 Views

just like Figure 5. Architecture of 2.5G, 1G/2.5G, 10M/100M/1G/2.5G, 1G/2.5G/10G, 10M/100M/1G/2.5G/10G (MGBASE-T) Configuration

in document 1/2.5/100G Multi-rate Ethernet PHY Intel® Stratix® 10 FPGA IP User Guide

0 Kudos
Deshi_Intel
Moderator
432 Views

HI,

 

The reference design can be generated insides low latency 10G MAC IP directly. The reference design will contains both MAC + PHY IP together.

 

You can also refer to below design example doc as reference.

 

Thanks.

 

Regards,

dlim

0 Kudos
BQi
Beginner
432 Views
Which page? I can not find the reference design has both 1GE/10GE support.
0 Kudos
Deshi_Intel
Moderator
432 Views

HI,

 

The reference design is mostly build up based on Multirate PHY IP. It may switch more than just 1G <=> 10G.

 

For example, you can refer to chapter 3 (page 22) or chapter 5 (page 43) reference design.

 

Thanks.

 

Regards,

dlim

0 Kudos
Deshi_Intel
Moderator
432 Views

HI,

 

I hope I have clarified your doubt.

 

For now, I am setting this case to closure.

 

Thanks.

 

Regards,

dlim

0 Kudos
Reply