Hello.i've configured FIFO megafunc in such way as on img1 then i've tried to test its operating in such way
module incomingCMD (); tri0 FULL, EMPTY, CLR, Q; tri0 CMD; tri0 USEDW; reg CLK, RDREQ, WRREQ; reg command; assign CMD = command; assign CLR = 0'b0; initial begin CLK <= 0'b1; RDREQ <= 0'b0; WRREQ <= 0'b1; end always begin # 10 CLK <= ~ CLK; end initial begin # 20 command <= 0'b1; # 30 command <= 0'b0; # 50 command <= 0'b1; # 70 command <= 0'b0; # 90 command <= 0'b1; # 20 command <= 0'b0; # 70 command <= 0'b1; # 10 command <= 0'b0; # 50 command <= 0'b1; # 80 command <= 0'b0; # 20 command <= 0'b1; # 40 WRREQ <= 0'b0; # 20 RDREQ <= 0'b1; end fifoCMD cmdSroradgeDevice ( .clock(CLK), .data(CMD), .rdreq(RDREQ), .sclr(CLR), .wrreq(WRREQ), .empty(EMPTY), .full(FULL), .q(Q), .usedw(USEDW)); endmodulebut i'got unexpected result my FIFO looks like dead. Sim on img2 Tell, me please my mistake... And also one more question.. I'm going to write a controller SD Card R/W. SD uses CMD line both to get seriall commands and to response it. Thus i would like to know what is the best way to provide this relation. Am i right that trying to get responses in FIFO and than compare with command meanings ? Or there is some more comfortable way to do it?
The reason is ModelSim can't find or open "entity SCFIFO" from library altera_mf.
vsim rtl_work.fifo1 # vsim rtl_work.fifo1 # Loading rtl_work.fifo1 # ** Error: (vsim-3033) C:/StoreDev/Altera/incDevFIRBUp4_FIFO/fifo1.v(79): Instantiation of 'scfifo' failed. The design unit was not found. # Region: /fifo1 # Searched libraries: # C:\StoreDev\Altera\incDevFIRBUp4_FIFO\simulation\modelsim\rtl_work # Error loading designI'm using ModelSim Starter 10c and QII 11.1. According to version.txt they are compatible, but i still have a problem... How can i directly put a link to "entity SCFIFO" in ModelSim
As i see there is some misunderstanding on my part during simulation megafunctions...i tried to find the answer in http://www.altera.com/literature/hb/qts/qts_qii53001.pdf http://www.altera.com/literature/hb/qts/qts_qii53025.pdf but there is still some misunderstandind is it correct sequence of operations to sim projects with altera mf? 1. create QII proj 2. create megafunction 3. compile proj 4. open modelsim 5. create modelsim proj 6. add to proj megafunction wizard generated file 6. create hdl file where mf used 7. add through file properties to mf file library file (C:\Altera\11.1sp1\modelsim_ase\altera\verilog\src\altera_mf) 8. compile 9. simulate in this way it works... is it correct??
i normally use NativeLink to generate a sim script and edit to taste, but your steps sound more involved than necessaryeither try NativeLink or try to just vlog your design files and test bench then run vsim. the fifo should reference the altera_mf library on its own