FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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hd_sdi arria II gx hardware problem

Honored Contributor II

i have simulated hd_sdi core in loop back and am getting exact data at the receiving side but in hardware am transmitting in loop back and am not getting any thing at the receive some junk data are coming .  


while transmuting am using embedded syn and in receiving am using discrete syn .whatever the data am sending in the transmission . 


plz sort out ASAP.
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