help:DDR2 can't init done

[Altera_Forum]

Hello , 

I want to use the MT47H32M16HR-25(D9KHQ DDR2),but I can't find the it in the " Mega Wizard -- > DDR2 SDRAM Control and ALTMPHY ",  I use the "MT47H32M16CC - 3" ,and repair the parameter ,but the signal(local_init_done) is low.how can i do ?   where can i find the example of DDR2(MT47H32M16HR-25)?

[Altera_Forum]

Disable Calibration in Megawizard window

[Altera_Forum]

thank you ! 

but I can't understand,

[Altera_Forum]

Can you simulate your design? Archive your project and send to bekrenyov@mail.ru

[Altera_Forum]

thank you : 

I use modelsim to simulate DDR2 - core,it is sucessful .  I think it is error by configuration IC parameter or PCB hardware

[Altera_Forum]

May be two reasons of init failure: calibration failure or invalid parameters loaded into DDR registers. If you disable calibration you can determine which problem you have.

[Altera_Forum]

thank you! 

I do ,but I can't understand what 's wrong :  I have a demo hardware of "EP3C120", the project can run sucessfully.it include DDR2 ,PLL and something else.  but I use the new hardware "EP3C40F484" ,it is failed .  so it is difficulty to find what happen

[Altera_Forum]

only change the FPGA and PCB

[Altera_Forum]

hi： 

I find the DDR2 core"cs_n,ras_n,cas_n" is always low .but the sucessful porject is pulse .

[Altera_Forum]

Check clocks

[Altera_Forum]

when I use signaltop capture the clock it is low,but use oscilloscope it is right"192Mhz"

[Altera_Forum]

Which frequency do you use for SignalTap? You can't see clock which have greater frequency than SignalTap clk

[Altera_Forum]

I use 250 Mhz,can't capture cas_n,ras_n,and cs_n,clk.

[Altera_Forum]

--- Quote Start ---  Disable Calibration in Megawizard window  --- Quote End ---    Hi! Is the calibration only for simulation?