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Valued Contributor III
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how can i use SDI IPcore in EP3C5E144

HI,evrybody.I'm newer in here.I want to use EP3C5E144 generate sdi test parttern.Can you give me an example?

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Valued Contributor III
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Firstly, generate a stream using test pattern generator(8 or 10bit stream + 27MHz clk + data valid signal), then use SDI megacore to generate SDI output. It requires 27MHz input clock (You must use the same as for the video parallel stream mentioned before) + 270MHz reference clock from the PLL of the 27MHz (ratio 10/1), if You're trying to generate SD SDI.

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Valued Contributor III
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thanks a lot

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Valued Contributor III
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--- Quote Start ---  

Firstly, generate a stream using test pattern generator(8 or 10bit stream + 27MHz clk + data valid signal), then use SDI megacore to generate SDI output. It requires 27MHz input clock (You must use the same as for the video parallel stream mentioned before) + 270MHz reference clock from the PLL of the 27MHz (ratio 10/1), if You're trying to generate SD SDI. 

--- Quote End ---  

 

 

yes,I just do it as socrates said.I use a vip test parttern,it's clk is 27MHz,10 bit,720X576,YCrCb,4:2:2.And I use SDI megacore generate SDI TX,it'clk si 27MHz and 270MHz.But the can't work.why? 

my question is the SDI core can generate EAV&SAV?An other example use a verilog make sdi frame.I use the SDI core need use make sdi frame myself or not? 

 

http://www.alteraforum.com/forum/attachment.php?attachmentid=3932&stc=1&d=1302328224
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Valued Contributor III
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anyone know ?

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