FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

interfacing PCIe IP

Altera_Forum
Honored Contributor II
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hello, 

 

I generated the IP compiler using MegaWizard plug-in manager , and I need help interfacing the IP at top level to do a transaction memory via PCI Express, is it explained somewhere ? 

Thanks
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