FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6423 Discussions

interlaken skew managenent

Honored Contributor II


currently i m working on verificatio of interlaken protocol 8lane 3g,i need to know as how to manage the skew problem through serial lanes.it is mentioned in doc that skew cant be greater than 107ui when sync word arrives on all lanes simultaneously.we took a reference lane and calculted skew for all other lanes wrt to reference lane.so the buffer of 2words maximum(67bits*2) is taken.can u suggest as how achieve sync and remove skew from the lanes?
0 Kudos
0 Replies