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Altera_Forum
Honored Contributor I
1,073 Views

local_rdata_valid in DDR2 Controller V7.2 SP3

HI: 

i have a problem about the local_rdata_valid in my design,i use DDR and DDR2 SDRAM Controller V7.2 SP3,DDR2 chip is MT47H16M16,and i find the signal local_rdata_valid the controller output sometimes delay one clock output and sometimes output right even the same sof file ,that is this time i downloader once my sof file and the local_rdata_valid output is ok,but next time i downloader the same sof file and the local_rdata_valid signal output delay one clock.i get the signal with signaltap! 

can any one tell me why?
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2 Replies
Altera_Forum
Honored Contributor I
29 Views

please do not send the same question multiple times

Altera_Forum
Honored Contributor I
29 Views

sorry ,i'm a little anxiety 

anyone can help me?
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