matrix operation in vhdl

[Altera_Forum]

Dear all, 

 Can anyone give me a simple code for matrix operation such as multiply, add, substract or etc.? I am new with vhdl. Many thanks

[Altera_Forum]

Those are simple operations that should be easy to write, and are a good way to learn VHDL! Try to write something and if you have problems we can help you. 

 Do you need synthesizable code or is it for a test bench? How are the matrices communicated to your VHDL component?

[Altera_Forum]

This is the code i write and actually i want to has a matrix transpose from row to column. 

 library ieee; use ieee.std_logic_1164.all;  entity transpose is port (    -- Inputs  in1 : IN integer RANGE -127 TO 127;  in2 : IN integer RANGE -127 TO 127;  in3 : IN integer RANGE -127 TO 127;   --Outputs  out1 : OUT integer RANGE -127 TO 127;  out2 : OUT integer RANGE -127 TO 127;  out3 : OUT integer RANGE -127 TO 127;   end transpose;  architecture transpose of transpose is type column is range -127 to 127; type row is range -127 to 127; type matrix is array (row,column) of integer; variable prod : matrix; variable i,j : integer;   begin  process  begin  for i in -127 to 127 loop  for j in -127 to 127 loop  prod (i,j)<= prod (j,i);  end loop;  end loop;  end process; end transpose;  I think the error is at the array structure.Can you tell me what am wrong? Many thanks

[Altera_Forum]

I notice several problems here: 

 1. arrays have to be declared like this:  type some_array_t is array(a to b, c to d) of integer; --downto can be used instead of to  so for you, you need   type matrix is array(row'low to row'high, column'low to column'high) of integer;  2. You cannot have variables in an architecture. Variables only belong in processes, functions or procedures. You must use signals instead (you can use shared variables, but DONT go there until you know what you're doing).  3. You dont need to declare i and j, they are declared when you create the loop.  I also notice with your code, nothing is connected to any inputs or outputs, is this intentional. What is your intention? to create synthesisable code or some testbenching code?

[Altera_Forum]

using negative indexes in arrays should be valid vhdl, but still seems a bit strange. And you you sure you want to use 255*255 matrices? 

You could create the array type in a package and then use it for both your ports and the signals inside your architecture. The matrix size could be declared as a generic, as long as you are okay with a fixed size.

[Altera_Forum]

--- Quote Start ---  using negative indexes in arrays should be valid vhdl, but still seems a bit strange.   --- Quote End ---    Not completly strange. If you're doing image processing it can make your life easier when the centre pixel (which will probably be the output location) is (0,0), rather than (128, 128), then you can use the indices as the offset.  But I agree with the other comment, 256x256 is an extreme array, you're essentially transposing an entire RAM. I get the feeling the OP is a software programmer with little hardware understanding.