oneAPI MVDR Beamforming Sample

[colinz]

This sample uses IO Pipes and UDP. If I want to run this sample in an Agilex FPGA card, does that mean the FPGA need to have Ethernet and TCP/IP ip core? 

https://github.com/oneapi-src/oneAPI-samples/tree/master/DirectProgramming/C%2B%2BSYCL_FPGA/ReferenceDesigns/mvdr_beamforming#build-and-run-the-design-using-real-io-pipes

Thanks.

[BoonBengT_Intel · Accepted solution]

Hi @colinz,

Thank you for posting in Intel community forum and hope all is well.

Based on the document would assump that you are running the fill system compilation, and for that the BSP that you would be included would have the required IP added accordingly.

Please let me know if I misunderstood the situation.

Best Wishes

BB

[BoonBengT_Intel]

Hi @colinz,

Good to know that we managed to clarify your doubts, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

Thank you for the questions and as always pleasure having you here.

Best Wishes

BB

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