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prefetchable/non-prefetchable memory

Altera_Forum
Honored Contributor II
2,701 Views

Hi I wanted to use a 32bit prefetchable on-chip memory with PCIe but SOPC builder will only allow 32bit non-prefetchable. I only wanted to use the prefetchable type because it seemed to be the recommended type, but i guess with SOPC builder, i hv to stick with the non-p. Are there any concerns in using this type? I simply want to write data into 1 port and later another system will read it via the other port. will the non-prefetchable do? The other portion is using a 64bit which allows the prefetchable, but i only need 32 bits and will be writing and reading using 32 bit wide bus. I don't want the extra burden of controlling the byte enables. what are the implications of not using the bus enables if i read and write on just the half of the bus?

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Altera_Forum
Honored Contributor II
1,208 Views

32 vs. 64 bit is the address bus width, not the data bus width, you know? And depending on your PCI BAR size, you’ll just see a fraction of these 64 bits of PCI address internally. 

 

I would be more concerned with the choice of prefetchable vs. non-prefetchable and the implication about data consistency and order of access. And the question how to bridge the gap to high-performance data transfers, i.e. DMA. 

 

With DMA you typically have just one BAR for a small number of non-prefetchable registers. Reading such a register might have side effects and must be in-order, so a prefetchable memory BAR is a no-go for such a register.
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