"What does Symbol width mean?"

[jjang]

I'm not sure about the concept of Symbol width used in "Avalon-MM Pipeline Bridge" or "Clock Crossing Bridge." Could you please provide more information or clarify your question?

When the term "symbol" is mentioned, it doesn't seem to specifically refer to BPSK or QPSK.

The datasheet mentions "Width of a single symbol in bits," which is quite confusing.

i asked GPT : gpt said 

 > In Avalon MM, a 'symbol' refers to the internal data transfer unit in the FPGA 

 it's mean..

Case 1:
> Data Width: 16
> Symbol Width: 16
=> In one Read operation, it reads/writes the full Data width.

Case 2:
> Data Width: 16
> Symbol Width: 8
=> It requires two Read operations, and in each Read, it reads/writes 8 bits.

and what's different  address units (Symbols, WORDS)

[Farabi]

Hello,

Regarding the symbol widths:

Symbol width should be 1, 2, 4, 8, 16, 32, 64 (bits) Number of bits per symbol. This should apply to all.

If you use byteoriented interfaces it should have 8-bit symbols. 

please refer previous forum : https://community.intel.com/t5/Intel-Quartus-Prime-Software/Qsys-Avalon-bus-symbol-width/td-p/1344251

regards,

Farabi

[Farabi]

Hi, additional information below:

"Symbol Width" is basically the size of your base unit of data - for example if it were bytes, it would typically be 8-bit. If you had a 12-bit ADC then your symbol would be 12-bit.

regards,

Farabi