read data incorrect from ddr2 sdram with altmemphy.

[Altera_Forum]

Hi,guys. 

  the Altmemphy megafuntion is used as the ddr2 sdram's phy interface in my project.But sometimes the read data is incorrect after read out from ddr2 sdram when on board test,it's that the read data is different from the wrtie data that located in the same address.In this case,the calibration is successfully done.

[Altera_Forum]

Is the termination of the transmission lines correct? In other words did you properly add ODT and OCT to your design (and thus the Rup and Rdown pins on the FPGA side)? 

 You also might want to post some more information about your project, since now we can just guess.