We refer the document UG20031”High Bandwidth Memory (HBM2) Interface Intel® FPGA IP User Guide”.
This IP can have 8 channels max. And can each channel access all HBM address 4GByte?
According to the referenced User guide fig16, the address bus width is 29bit in Byte.
I concern about each channel have an access limit 512MByte .
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I am not the HBM2 expert, anyway I will help to check with my colleague regarding this inquiry.
Please allow me some time to check with him and I will update you ASAP.
Thank you for your kind understanding.
Good news! I have an update for you.
The HBM device has 2 type.
Can you confirm which type are you referring to. Assuming it is 8GB type with 8-high stack:
To answer your questions:
I sincerely hope this helps.