FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5923 Discussions

the Tdivw_total & VdiVW_total of DDR4-2666 when use the EMIF IP on Arria 10

lambert_yu
Beginner
162 Views

Hi all,

 

    I have one problem, when I customize the EMIF IP on Arria 10, the Tdivw_total & Vdivw_total should be set following the value in the datasheet of MT40A512M16LY-075, or should be kept following the preset value which provides in the preset example? And in the DDR's data, the Tdivw_total & Vdivw_total are all maximum value, why it's minimum value in the EMIF User guide?

     value in datasheet of MT40A512M16LY-075 : Tdivw_total : 0.22UI, Vdivw_total : 120 mv

     Value following the preset value : Tdivw_total : 0.20 UI, Vdivw_total : 138mv,

   So should I set which value is preferable? Could someone help me and give me some advice?

 

Brs,

Lambert

0 Kudos
1 Solution
yoichiK_intel
Employee
145 Views

Hi Lambert

 

The Tdivw_total and Tdivw_total  parameter slightly differs across the DDR4-2666 bin. Please check the datasheet which you use actually and use the number on the datasheet.

View solution in original post

1 Reply
yoichiK_intel
Employee
146 Views

Hi Lambert

 

The Tdivw_total and Tdivw_total  parameter slightly differs across the DDR4-2666 bin. Please check the datasheet which you use actually and use the number on the datasheet.

Reply