I am trying to test the LL 10G example and the Quartus generated time limited sof file. Can I use system console to debug this kind of sof file. I am experience some problem with register access: I get master_read_32: Channel closed error every time I access the register in the design.
Could you share the error message?
I am not sure if using the JTAG-to-Avalon Master bridge helps in your case. You can troubleshoot by referring to the link below.