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vip clock in and clock out

Altera_Forum
Honored Contributor II
‎04-14-2012 02:34 PM
1,224 Views

In my design for connection with the hd_SDI i am using clkin and clkout (vip) back to back and taking my output and feeding to the hd_SDI ip core . 

 

vedio ==> clkin ip ==> clkout ip ==> hd_SDI(ip) 

data (embedded) (VIP) (VIP)  

 

 

here the issue am facing is am not able to get the output from clkout ip (vip). 

am using 1080i 60 hz. 

 

plz tell me whether my approach is correct or not .
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Altera_Forum
Honored Contributor II
‎05-31-2012 04:02 PM
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the clock out vip don't out clock 

you need to insert clock to get the data out 

it is an input clock and not out
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