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vip cores, downscaler and upscaler

Altera_Forum
Honored Contributor II
‎03-21-2017 02:09 AM
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Dear, 

 

 

I'm doing vip cores to realize the downscaler.  

 

Quartus14.0, cycloneV, clocks: nios_cpu_clock- 100MHz, avslon_st_clk- 150MHz, avalon_mm_clock- 100MHz. 

 

1.downscaler  

 

cvi(1920x1080) -- bdil(1920x1080) -- vfb II(1920x1080) -- scl II(720x576) -- itl(720x576) -- cvo(run control)(720x576) 

 

 

The cvi is overflow somtines and bdil have timing warnning. How to deal with it?
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Altera_Forum
Honored Contributor II
‎03-21-2017 02:49 AM
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The upscaler's vip seeting are in the attachments.

multiple-attachments.zip
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