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vip_example_design_3c120 design as in AN 427

Altera_Forum
Honored Contributor II
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Hi  

Can anyone post please the original vip_example_design_3c120 design as mentioned in the AN 427 document.Or give me a link to get the example design for the ALTERA
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Altera_Forum
Honored Contributor II
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You can find everything from here 

 

ftp://ftp.altera.com/outgoing/devkit
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Altera_Forum
Honored Contributor II
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Altera_Forum
Honored Contributor II
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I using the Altera cyclone III EPC3C120 Development board connected by HSMC interfaces to Bitec HSMC quad video and DVI daughtercards. 

 

The kit refers to AN 427 VIP sample design and asks it to download from the ALTERA site. 

The name of the file is vip_example_design_3c120_<version>.But I cannot find this file on the website of Altera to start with the kit. 

 

I tried to run the sample code but i got these errors. 

 

 

Error: Top-level design entity "top" is undefined 

Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings 

Error: Peak virtual memory: 220 megabytes 

Error: Processing ended: Mon Feb 21 12:17:30 2011 

Error: Elapsed time: 00:00:01 

Error: Total CPU time (on all processors): 00:00:01
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Altera_Forum
Honored Contributor II
680 Views

thanks dude

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Altera_Forum
Honored Contributor II
680 Views

I am now running the project but when i am trying to open the files in the Nios 2 environment by creating a project and a .bsp file I get this error. 

 

 

Failed to execute: ./create-this-app --no-make 

chmod: changing permissions of `.': Permission denied 

chmod: changing permissions of `./create-this-app': Permission denied 

 

can you tell me why?
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Altera_Forum
Honored Contributor II
680 Views

I get this error when I try to create a blank project.it is not creating the .bsp file for the project and giving me this error

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Altera_Forum
Honored Contributor II
680 Views

Try running the tools as administrator. (Right clock the icon or start menu item and choose "Run as administrator". 

 

For some versions of the Altera tools, the installer did not set the permissions correctly on all the required files. I think they finally fixed it in 10.1.
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Altera_Forum
Honored Contributor II
680 Views

Hey thanks it worked out ..it was a problem of the admin rights.

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Altera_Forum
Honored Contributor II
680 Views

 

--- Quote Start ---  

I using the Altera cyclone III EPC3C120 Development board connected by HSMC interfaces to Bitec HSMC quad video and DVI daughtercards. 

 

The kit refers to AN 427 VIP sample design and asks it to download from the ALTERA site. 

The name of the file is vip_example_design_3c120_<version>.But I cannot find this file on the website of Altera to start with the kit. 

 

I tried to run the sample code but i got these errors. 

 

 

Error: Top-level design entity "top" is undefined 

Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings 

Error: Peak virtual memory: 220 megabytes 

Error: Processing ended: Mon Feb 21 12:17:30 2011 

Error: Elapsed time: 00:00:01 

Error: Total CPU time (on all processors): 00:00:01 

--- Quote End ---  

 

i had the same error ??????
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Altera_Forum
Honored Contributor II
680 Views

Hi, 

 

I got it working finally...I have done it with the quartus 10.1 sp1 web edition.You will get errors initially but try to follow them and erase them.You will get it workin.Dont forget to have the admin rights.. 

 

If u need any help post here..
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Altera_Forum
Honored Contributor II
680 Views

thanx ,,,, but i have error in nios ii that connected system is don't found

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Altera_Forum
Honored Contributor II
680 Views

Did you include your Sopc degin in the Quartus and add the files in the project?Add all the sdc files in the design?It should not come like that..I am surprised.Can u post your warnings?Check the warnings.You might be missing some thing there to add in your design.

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Altera_Forum
Honored Contributor II
680 Views

there is no thing about quatus but it with Nios i put sysid in qsys ,,, that generate expected id and expected timestamp but don't found connected id

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Altera_Forum
Honored Contributor II
680 Views

that's my graduate project and i hope to solve this problem

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Altera_Forum
Honored Contributor II
680 Views

Hi, 

 

I can understand.Just stay cool.I think if you use the free version the timestamp is not detected neither the sysid.Better ignore both the options.it wont bring any big difference in the system as it is you dont have multiple systems.Ignore them and proceed.You will get it working.If you want I can put up the example code here.But the file size is too big I guess.There are many posts on the forum with regard to the problem you are facing of the timestamp.Ignore it better I suggest. 

 

Sn
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Altera_Forum
Honored Contributor II
680 Views

thanx 4 replaying ....... i ignored both .... and run as hardware nios ii and every thing alright .. but the video can't pass through kit to monitor

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Altera_Forum
Honored Contributor II
680 Views

i hope i get your code to check my results

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Altera_Forum
Honored Contributor II
680 Views

i put sysid in qsys this solve the expected id and timestamp ..... 

but the problem : " connected id : don't found "
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Altera_Forum
Honored Contributor II
680 Views

plz send me the code via email

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Altera_Forum
Honored Contributor II
613 Views

Hey  

 

Do u have the daughter video card from bitec?U can try the code from bitec I have verified and it is working. 

 

Try to download the J8.sof of this example DVI 1080P Loop-through (Beta) 

 

The link is  

 

http://www.bitec.ltd.uk/ciii_video_dev_kit.html 

 

You may have to check the settings of the monitor also and select the DVI monitor.If you have a graphics card it will give u an option to choose the multiple monitor.Choose the correct moitor and set the refresh rate to 54 or 56 .And also the correct image format of DVI 

 

 

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