加入SDC文件后编译报错

[NZhan1]

在用7.2版本进行时序约束的时候，写好的SDC文件在全局编译的情况下始终会报错；其报错内容为：

      1，Critical Warning: Read_sdc failed due to errors in the SDC file

      2，Error: wrong # args: should be source fileName    while executing source -rsrc itcl    (uplevel body line 1)    invoked from within uplevel #0 source -rsrc itcl

针对这个问题做过一些尝试：

1. 简化SDC内容，仅在其中加一个FPGA的输入时钟约束甚至清空SDC的内容；编译时仍然报这个错；
2. 把工程在7.1版本中打开，同时生成一个SDC文件并加载编译，没有编译报错；
3. 在7.2工程中删除SDC文件，然后clean project，之后再加入SDC文件，再编译时还是这个错误；
4. 由于使用的project是之前同事编译好的project的QAR压缩版解压；我在原版解压后编译任何SDC不报错，但是在我进行任何代码的更改之后再编译SDC会报错。

关于这个报错，请问有什么建议吗？谢谢

[KhaiChein_Y_Intel]

Hi,

Could you share both the working and non-working sdc file?

Thanks.

Best regards,

KhaiY

[NZhan1]

Hi KhaiY, Pls check the attachment. Thanks! But for the same SDC working with the same Quartus project, it will be okay on version 7.1, but not version 7.2. Thanks! ************************************************** DISCLAIMER: This email is for the use of the intended recipient(s) only. If you have received this email in error, please notify the sender immediately and then delete it. If you are not the intended recipient, you must not keep, use, disclose, copy or distribute this email without the author’s prior permission. We have taken precautions to minimize the risk of transmitting software viruses, but we advise you to carry out your own virus checks on any attachment to this message. We cannot accept liability for any loss or damage caused by software viruses. The information contained in this communication may be confidential and may be subject to the attorney-client privilege. If you are the intended recipient and you do not wish to receive similar electronic messages from us in future then please respond to the sender to this effect. **************************************************

[KhaiChein_Y_Intel]

Hi,

I could not find the attachment in this forum thread. Could you please reattach?

Thanks.

Best regards,

KhaiY

[NZhan1]

Hi KhaiY

It's uploaded, Thanks!​

[KhaiChein_Y_Intel]

Hi,

The sdc file looks good. Could you share the full error message including the submessages?

Thanks.

Best regards,

KhaiY

[NZhan1]

Hi KhaiY The error message is: 1，Critical Warning: Read_sdc failed due to errors in the SDC file 2，Error: wrong # args: should be source fileName while executing source -rsrc itcl (uplevel body line 1) invoked from within uplevel #0 source -rsrc itcl But for “source -rsrc itcl”, it is not a phase on qsf or tcl. And itcl is not a project file, we don’t know what file it is. The project is from a former qar. The timing constrains are listed in qsf. Customer converts qsf to sdc on Timequest. And to compile the project with new sdc. It works. We wondered if the error is caused by the conflict between qsf and sdc. Regards， Nicole

[KhaiChein_Y_Intel]

Hi,

This might be the reason. Since customer can compile the design after creating a new sdc, I suggest customer to continue using the new sdc. If customer faces any problem with the new sdc, please provide the design for investigation. I can help to compile in the latest version of the software and see if the problem persists.

Thanks.

Best regards,

KhaiY