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请教下关于2L Bank的GPIO用法~

AMa
Partner
186 Views

请教一个Arria 10 SoC内的GPIO 用法~

在Cyclone V上,HPS组件的pin 栏可以选择做GPIO 或者 路由到FPGA侧使用。那么在Arria 10内的HPS组件中,Advanced Pin Placement内,假设我将Q3_10,Q3_11选择成None,在FPGA的顶层中,给这两个IO赋恒值 1, Pin Planner内做IO分配到对应的位置上,在Fitter时,会报错。

请问,在Arria 10上,如果FPGA想使用 2L Bank的IO,在Qsys内除了改成None,是不是还要做什么特殊设置? 或者 Pin Planner内不需要约束?

谢谢~

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2 Replies
Rahul_S_Intel1
Employee
75 Views

Hi ,

Could you please send me a sample project to replicate the error

Rahul_S_Intel1
Employee
75 Views

Hi ,

 

 Kindly let me know if you need further assistance.

 

Reply