Community
cancel
Showing results for 
Search instead for 
Did you mean: 
BQi
Beginner
122 Views

20 10GE example design

The customer need 20 10GE in Stratix 10 MX 1SM16B, we use the 10GE low latency 10GE MAC example design. we found it has the parameter NUM_CHANNELS in hdl code

the parameter NUM_CHANNELS would be from 1 to 12. but when we change the parameter NUM_CHANNELS above 6. it would fail.

I found the ATX PLL would be limited for this design. how we do for 12 channels?

0 Kudos
5 Replies
BQi
Beginner
45 Views

I found it seems that the 10GE example design is based H tile. but I would like put these 20 channels 10GE into E tile. would u pls help us about this?

Deshi_Intel
Moderator
45 Views

HI,

 

In general, you can check out all Ethernet IP solution supported by Intel FPGA in below link.

 

As you can see from above link - Etile Ethernet IP is called "E-Tile Hard IP for Ethernet"

 

And also to address your concern better, Intel also developed an excel tool called Ethernet pin placement tool to guide user on how to fit IP solution into one Etile. Different setting selection like RSFEC and PTP will affect Etile pin placement accordingly.

 

Thanks.

 

Regards,

dlim

BQi
Beginner
45 Views

I have setup the 4 channels 10GE with the E tile hard IP for ethernet, I found 4 channel 10GE would cost less than 8K ALM, 3 M20K I don’t know if it is accurate resource utilization. I found the rough resource is 2.2K ALM, 6 M20K in table 7 of https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-s10-etile-hip-etherne... How about this ? And how to do 20+ 10GE with one E tile?
Deshi_Intel
Moderator
45 Views

Hi,

 

Can you tried out the Etile pin placement excel tool first as I mentioned in my previous reply ?

  • Don't worry about Quartus design for now as your concern is how to fit 20+ 10GE with one E tile, right ?
  • Different Ethernet setting like RSFEC and PTP may affect the pin placement result also

 

Once you have verified customer Ethernet design setting requirement is able to fit into one Etile, then only you start look into creating multiple Etile hard IP in Quartus project to estimate the resource.

 

Thanks.

 

Regards,

dlim

Deshi_Intel
Moderator
45 Views

Hi,

 

I have not hear back from you for close to 2 months.

 

Hopefully you find Etile pin placement tool useful.

 

For now, I am setting this case to closure.

 

Thanks.

 

Regards,

dlim

Reply