Here is a simple question:q: how do i generate a 3.3 v level digital output from my cyclone iii starter kit ? i setup the following experiment: 1) I wrote a simple code to transfer a digital input directly to a digital output, in Quartus II. 2) In the Assignment Editor, I changed the I/O Standard for the both the pins (input & output), from the "2.5 V (default)" to "3.3 V - LVCMOS" & compiled. 3) Now I supply a 0V - 3.3V square wave as input & watch the output on a CRO. observations: 1) Output high state is still at 2.5 V :( 2) Not sure about FPGA input-setting as well ... meaning : has it really changed to the 3.3 V LVCMOS Standard, or is still at the 2.5 V (default) but accepts a 3.3 V input signal as high. I searched extensively on the user-forums, with people discussing a lot about VCCIO levels, and PCI Clamp diodes ... but still, I do not get a single clue as to : what exactly do i need to do in quartus ii, to get my final 3.3 v output. Please help asap.
I guess, you refer to the Altera EP3C25 Starter Board? Please take a look at the schematic sheet 8. All 8 VVCIO nodes are tight to VCC25 (2.5V supply) as well as VCCA, which is restricted to 2.5V. I don't see, that the design provides an option to change the voltage of an individual bank.Did you check, if your hardware can possibly work with 2.5 V logic level as well? The FPGA inputs can be driven with 3.3V logic level, as long as the maximum ratings are kept and overshoots are avoided. If you absolutely need 3.3V logic level, an external level converter has to be utilized.
Thank You very much fvm, for the quick response. You saved me from further headaches.Now that I know that, 2.5V is the Starter-Kit standard ... a 3.3V-level input signal won't be that much of a problem (I've tested it) But for my output, which was supposed to go to a 3.3V-level DAC ... I'll need to check its compatibility with 2.5V-level. Or otherwise, as thangalt says ... search for a voltage translator IC. So long then.
It depends on the inout level specification of the connected part. Many devices have a LVTTL specifiaction (about 1.6V Vih), they can be driven by 2.5V CMOS as well. Devices witha a 3.3V LVCMOS specification (Vih = 0.7*3.3V) in contrast typically work, but don't achieve a sufficient level margin, so a level translation IC should be used.