About Arria V LVDS output

[JLIU45]

I'm uising arria V device in my project, a pair of LVDS pins are used in my design, which are configured as output. It always cannot work well, and by using OSC I watched the output waveform of LVDS port, it was quite strange, the pos and neg pins are the same, and even the Vocm and Vdm is incorrect, refer the below image. I'm sure the pin configuration is accurate, and the pins is not demaged since I tried another LVDS pin. So, whats could be the reason? thanks

[SreekumarR_G_Intel]

Can you share the sch and output interface connected to the LVDS output ?

Thanks ,

Sree

[JLIU45]

Yes, pls see the attached images. In fact I use Arria V GX Starter Kit Board as LVDS transmitter, and C5 board is our own, there is no other devices on the LVDS bus, just connecting the Arria V to Cyclone V direclty.

[JLIU45]

my C5 board

[JLIU45]

Hi, is there any update?

[SreekumarR_G_Intel]

Hello,, sorry for delay in response.

There should be common mode voltage in the LVDS bus which i didnt see in the graph you sent me.

can you check the LVDS std is set correctly ?

Thank you,

Regards,

Sree

[JLIU45]

Hi, thanks. I just set the I/O standard to LVDS in pin planner, always I do like this, and it works well besides this case. For Arria-V device, is there any other special configuration for LVDS pin?

[JLIU45]

Hi, how is the thing going on? thanks

[SreekumarR_G_Intel]

Sorry , I am not sure what is missing here.

Can you check is IO is not open ended ? Pretty much looks like other side is open.

Is there any external termination ?

Thank you ,

regards,

Sree

[JLIU45]

Hi, The LVDS output is connected to another LVDS input directly, and there is termination on the receiver side. Also, I’ve mentioned I compared the LVDS output between Arria V and cyclone V, for both the LVDS output is open, the waveform is quite different.

[YuanLi_S_Intel]

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