Agilex7- what is acceptable peak to peak differential voltage swing of input clocks.

[P2tel]

Hello,

we are having a clock generator which is providing differential clocks to Agilex 7 device, refer attached waveform.

what is the minimum acceptable differential voltage swing required.

[AqidAyman_Intel]

Hi,

May I know what specific Agilex 7 device that you are using?

https://www.intel.com/content/www/us/en/products/details/fpga/agilex/7.html

[AqidAyman_Intel]

As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.