Altera MaxV Cpld

[Kishore]

Getting started with Altera MaxV CPLD with quartus2. What are all the pre-requisites that I supposed to be ready with? Also, suggest the computational methods for data manipulation like Avg, normalize etc. Hardware description: This CPLD is used in our product for getting in the data from the ADC and computing as our requirement and send the manipulated data to the processor. But here the is continuous and live. And the Sampling rate of the ADC is very high.

[ak6dn]

Why are you going with Max V at this point in time? It is 10yr old 180nm technology.

Why not go with Max 10 series family? It is newer 55nm technology, and offers such features as embedded multipliers/DSP blocks for signal processing that are not available in MaxV series.

From your minimal list of desired features (average, normalize, etc) for data processing pipeline Max 10 seems much more like a fit.

[EngWei_O_Intel]

Hi Kishore

You need to check on the hardware and software requirement to start off with, which is stated in the link below:

https://www.intel.com/content/www/us/en/products/programmable/cpld/max-v.html

There are also couple of design guideline which can be obtained from the documentation site:

https://www.intel.com/content/www/us/en/programmable/products/cpld/max-series/max-v/support.html

Thanks.

Eng Wei

[EngWei_O_Intel]

Hi Kishore

We do not receive any response from you to the previous answer that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Eng Wei