Altera PCI Express Development Kit: Linux DMA Driver - Page 4

Altera_Forum · ‎01-22-2009

Hi,

I am a newbie to FPGA design and implementation. While installing the PCI express board on LINUX machine, I don't see Demo application driver for DMA read and write for LINUX (Manual talks about windows installation).

I want to generate DMA read and write in Linux box. Does anyone have pointer to a sample application, driver or sof file for the same.

Let me know if I am wrong in understanding.

Thanks in advance.

-Vineet

Altera_Forum · ‎02-18-2012

Any idea what might be causing this problem? I m using PCI compiler express in SOPC builder:

[ 4378.233120] BAR0 0xd0000000-0xd07fffff flags 0x0012120c

[ 4378.233153] BAR2 0xff600000-0xff60ffff flags 0x00020200

[ 4378.233276] BAR[0] mapped at 0xf81c0000 with length 32768(/8388608).

[ 4378.233373] BAR[2] mapped at 0xf8140000 with length 256(/65536).

[ 4378.233447] bar_tests().

[ 4378.233466] write_header = 0xf8140000.

[ 4378.233488] read_header = 0xf8140010.

[ 4378.233511] &write_header->w3 = 0xf814000c

[ 4378.233534] &read_header->w3 = 0xf814001c

[ 4378.233556] ape->table_virt = 0xf65a4000.

[ 4378.233608] Allocated cache-coherent DMA buffer (virtual address = 0xfffffffff6150000, bus address = 0x0000000036150000).

[ 4378.233747] Filled First descriptor , read

[ 4378.233773] Descriptor Table (Read, in Root Complex Memory,# = 1)

[ 4378.233804] 0xf65a4000/0x00: 0x00000000

[ 4378.233829] 0xf65a4004/0x04: 0x00000000

[ 4378.233852] 0xf65a4008/0x08: 0x00000000

[ 4378.233875] 0xf65a400c/0x0c: 0x0000fade

[ 4378.233900] 0xf65a4010/0x10: 0x00000800

[ 4378.233924] 0xf65a4014/0x14: 0x00001000

[ 4378.233947] 0xf65a4018/0x18: 0x00000000

[ 4378.233971] 0xf65a401c/0x1c: 0x36150000

[ 4378.233996] writing 0x00060001 to 0xf8140010

[ 4378.234023] writing 0x(null) to 0xf8140014

[ 4378.234049] writing 0x365a4000 to 0xf8140018

[ 4378.234069] Flush posted writes

[ 4378.234088]

[ 4378.234097] Start DMA read

[ 4378.234119] writing 0x00000000 to 0xf814001c

[ 4378.234141] EPLAST = 64222

[ 4378.234159] POLL FOR READ:

[ 4378.234182] ape->table_virt->eplast (0xf65a400c) = 0x0000fade.

[ 4378.234208] EPLAST = 64222, n = 0

[ 4378.234242] ape->table_virt->eplast (0xf65a400c) = 0x0000fade.

[ 4378.234268] EPLAST = 64222, n = 0

[ 4378.234300] ape->table_virt->eplast (0xf65a400c) = 0x0000fade.

[ 4378.234327] EPLAST = 64222, n = 0

.

< repeats>

[ 4378.240440] Descriptor Table (Write, in Root Complex Memory,# = 1)

[ 4378.240469] 0xf65a4000/0x00: 0x00000000

[ 4378.240495] 0xf65a4004/0x04: 0x00000000

[ 4378.240521] 0xf65a4008/0x08: 0x00000000

[ 4378.240546] 0xf65a400c/0x0c: 0x0000fade

[ 4378.240570] 0xf65a4010/0x10: 0x00000800

[ 4378.240596] 0xf65a4014/0x14: 0x00001000

[ 4378.240621] 0xf65a4018/0x18: 0x00000000

[ 4378.240646] 0xf65a401c/0x1c: 0x36152000

[ 4378.240667]

[ 4378.240676] Start DMA write

[ 4378.240695] POLL FOR WRITE:

[ 4378.240718] ape->table_virt->eplast (0xf65a400c) = 0x0000fade.

[ 4378.240745] EPLAST = 64222, n = 0

[ 4378.240780] ape->table_virt->eplast (0xf65a400c) = 0x0000fade.

[ 4378.240806] EPLAST = 64222, n = 0

.

[ 4378.246908] COMPARE:

[ 4378.246933] [f6150000] = 0xf6150000 != [f6152000] = 0x00000000 ?!

[ 4378.246956] DMA loop back (CPU->FPGA->CPU) FAILED

[ 4378.246975] DMA loop back test FAILED.

Altera_Forum · ‎03-16-2012

Hi everyone.

I'm having a similar problem, gpushkar. I'm trying to run the DMA-test in a Arria GX II, but somehow the FPGA is not updating the EPLAST register, which means the DMA is not going at all through the Descriptors! I wonder if it is a matter of wrong addressing...

Did anyone manage to get more insight into this?

Best regards,

Pedro