I am trying to use quartus_sta on a MAX 10 project in Quartus 18.1, but I am getting an error, see error.png It happens when I in the constrainer set the data rate to Double data rate, see constrainer.png. I aperas to me that Intel/Altera have renamed the DDR register but have forgotten to update the quartus_sta script, see ddio.png
This seems to be a bug, however, Quartus std version are only in maintenance mode. There will be no fix on the bug because in pro edition there are no longer soft LVDS.
What you can do is write the sdc file on your own. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altlvds.pdf page 45.
We will file a kdb to let other customer know on this.
You are aware that MAX 10 is not supported by pro edition?
So what you are stating is that Intel is going to discontinue or stop supporting MAX series together with Stratix (IV, V), Arria (II, V), Cyclone(IV, V, 10LP)?
The only devices supported by pro edition is Stratix 10 and Arria 10 and Cyclone 10 GX!
Intel is not discontinue or stop supporting. But the bug fix will depend on how critical the issue, it there are alternative way of doing it, it will not fixed in any time soon.
I presume you are referring to the -ssc option shown in AN433. I've never even noticed that option before. Perhaps it does not work with MAX 10 devices. I'd recommend following the methodologies in either of these online trainings instead (much easier to understand than that app note):