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Altera_Forum
Honored Contributor I
1,523 Views

Arria 10 Dev Kit -- USB-Blaster flash programming instructions

Re: The Arria 10 GX Dev Kit 

 

Do instructions exist for programming the hardware1 area in flash with the usb-blaster

 

I need a faster way than: 

1.) remove dev kit from PC 

2.) Set SW6.4 to ON (Factory BTS load) 

3.) Load the new .flash file via the on-board web server. 

4.) Push two buttons on the dev kit (PGM_SEL and PGM_CONFIG) 

5.) Set SW6.4 to OFF (User) 

6.) re-install dev kit in PC
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5 Replies
Altera_Forum
Honored Contributor I
121 Views

Hi, I am assuming that you are talking about the EPCQ flash on the board - sorry if this is not correct, as I don't have this board - perhaps you can consider updating the flash image via UART? I believe I saw some design examples using Nios to handle that.

Altera_Forum
Honored Contributor I
121 Views

Hi  

 

I am trying to bring up the board Arria 10 Soc Development board using on-board USB-II blaster with sw1,2,3 and jumpers necessary config settings for sx device using q v16.1 .  

 

Programmer throws error of " two devices found instead of one physical chain device in jtag chain" ..! 

 

Any way to fix it..? 

 

Regards 

Vijay
Altera_Forum
Honored Contributor I
121 Views

Hi All, we just went through this at our company. This post assumes you have built your A10 FPGA load and it loads through JTAG, and you haven't messed with the MAXV FPP loader.  

 

That said, the first thing you need to do is create your SOF file to load into user FLASH. In Quartus prime, select File > Convert Programming files. In the conversion gui, select your output type as "Programmer Object File (.pof)". Next select the Configuration device, which for the A10 dev kit, is CFI_2Gb. Next select the mode which is Passive Parallel x32. Now set your output file (what you want your output to be called, and location). Now select Options/Boot info: set the Option bit address to 0x018000 (See p. 53 of the dev kit user guide for Flash address breakdown). Check "Create Memory Map File" if its not already checked - this will be your verification of your settings later - the map file will be of the same name as your output file, and you can always look at it to make sure you put in the right addresses. 

 

Now click on SOF data in the "Input Files to Convert" window, and then "Add file". Now select your output SOF from Quartus (your A10 design).  

 

What you need to do now is map the address of where your design will go in flash. To do this, select the SOF_Data line in the "Input Files to Convert" window again, and now select properties (on the right hand side). Select page 1 and change the address mode from Auto to Block. Now set your Start address to 0X02D00000, and end address to 0x057FFFFF (user hardware one space - as defined in the A10 dev kit User guide). Select OK and you should be able to generate a file at this point. 

 

Start the Quartus programmer and initialize the chain. You should see the FPGA, the MAX V device and the CFI_2G Flash device hanging off the MaxV. Select the Flash, and "change file". Browse to your new .pof and select OK. IT should take several seconds to load. After it does select Program/Configure and Verify for the Flash device. Its okay if the .pof file, Page_1, and Option Bits boxes are all selected. Hit program and wait forever. 

 

******YOU WILL PROBABLY GET A FAILURE DURING LOAD OF THE FLASH ***** 

 

This seems to be okay, ignore it, and power off your board. Make sure that on the backside of the board, that SW6, pin 4 is set to off (see p.3 of the user guide - if this switch is on, then the factory page will load, not user space 1). Also make sure Switch 5, MSEL is set to "001" for FPP programming protocol, that means bit (2) = "on", bit (1) = "on" and bit (0) = "off". 

 

Turn your board back on, your design should load.
Altera_Forum
Honored Contributor I
121 Views

Hi, 

 

I am new to Quartus Software and its workflow. Please bear with my question. 

 

I generated sof file and converted to pof file as mentioned above. I did not get any error while programming flash. I changed SW6 setting and also checked for SW5 in correct position. But it seems it did not work. My program was to blink one LED but instead it keeps blinking alternate user LEDS.  

 

Do we need to use Parallel Flash Loader IP Core to use CFI Flash on board? Any step by step tutorial will be great. 

 

Thanks and Regards, 

Parthiv
Altera_Forum
Honored Contributor I
121 Views

 

--- Quote Start ---  

Hi All, we just went through this at our company. This post assumes you have built your A10 FPGA load and it loads through JTAG, and you haven't messed with the MAXV FPP loader.  

 

That said, the first thing you need to do is create your SOF file to load into user FLASH. In Quartus prime, select File > Convert Programming files. In the conversion gui, select your output type as "Programmer Object File (.pof)". Next select the Configuration device, which for the A10 dev kit, is CFI_2Gb. Next select the mode which is Passive Parallel x32. Now set your output file (what you want your output to be called, and location). Now select Options/Boot info: set the Option bit address to 0x018000 (See p. 53 of the dev kit user guide for Flash address breakdown). Check "Create Memory Map File" if its not already checked - this will be your verification of your settings later - the map file will be of the same name as your output file, and you can always look at it to make sure you put in the right addresses. 

 

Now click on SOF data in the "Input Files to Convert" window, and then "Add file". Now select your output SOF from Quartus (your A10 design).  

 

What you need to do now is map the address of where your design will go in flash. To do this, select the SOF_Data line in the "Input Files to Convert" window again, and now select properties (on the right hand side). Select page 1 and change the address mode from Auto to Block. Now set your Start address to 0X02D00000, and end address to 0x057FFFFF (user hardware one space - as defined in the A10 dev kit User guide). Select OK and you should be able to generate a file at this point. 

 

Start the Quartus programmer and initialize the chain. You should see the FPGA, the MAX V device and the CFI_2G Flash device hanging off the MaxV. Select the Flash, and "change file". Browse to your new .pof and select OK. IT should take several seconds to load. After it does select Program/Configure and Verify for the Flash device. Its okay if the .pof file, Page_1, and Option Bits boxes are all selected. Hit program and wait forever. 

 

******YOU WILL PROBABLY GET A FAILURE DURING LOAD OF THE FLASH ***** 

 

This seems to be okay, ignore it, and power off your board. Make sure that on the backside of the board, that SW6, pin 4 is set to off (see p.3 of the user guide - if this switch is on, then the factory page will load, not user space 1). Also make sure Switch 5, MSEL is set to "001" for FPP programming protocol, that means bit (2) = "on", bit (1) = "on" and bit (0) = "off". 

 

Turn your board back on, your design should load. 

--- Quote End ---  

 

 

I found mikezgrtf's post to be very helpful in getting a user image loaded from flash. However, there was a small typo that may have led to pms' problems getting it to work. The option bit address should be 0x0180000. That's four trailing zeros. 

 

The rest of the guide works perfectly. Thanks for writing it up, mikezgrtf!
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