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Arria 10 External Memory Interface and NIOS II

Altera_Forum
Honored Contributor II
898 Views

I am attempting to use the Arria 10 External Memory Interface with a NIOS II processor to run a bare metal hello world C program on a Arria 10 GX Dev Kit. I was able to run the code with on chip memory but when I added the EMI IP core to the Qsys system without connecting the Avalon MM bus to either the Data Master or Instruction Master the design failed. I use the nios2-download command in the NIOS II system window and it finds the processor but the processor does not respond with the EMI present. Has anyone used the Arria 10 External Memory Interface with a NIOS II processor successfully?

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2 Replies
Altera_Forum
Honored Contributor II
140 Views

It does sound a little bit weird or maybe typo: "but when I added the EMI IP core to the Qsys system without connecting the Avalon MM bus to either the Data Master or Instruction Master the design failed". 

 

Try to connect them first. Ensure that there is no timing issues.
Altera_Forum
Honored Contributor II
140 Views

What I meant to say was that I had a working system with onchip memory and instantiated the memory controller in the Qsys design without connecting it so the processor still only saw the onchip memory. With the addition of the memory controller the elf failed to download in the same manner as if the processor was using the external memory.

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