UG-20007 indicates that the DDR3L on the HILO daughter board is 5x MT41K512M16TNA-107. However, when using the preset ("ARRIA 10 GX FPGA Development Kit with DDR3 HILO") to generate an EMIF example design, the component seems to be MT41K256M8TNA-093 (tFAW = 25, row address width = 15, memory clock frequency = 1066.667).
This is based on Q Prime Pro 20.2.
Does someone know what the correct information is? I currently don't have access to a devkit to check the devices themselves.