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Arria 10 GX Transceiver Signal Integrity Development Kit Board

Fresh_Leon
New Contributor I
190 Views

Dear,

 

I have one "Arria 10 GX Transceiver Signal Integrity Development Kit" board.

When running BTS (Board Test System) to check high speed signal of Arria 10 transceiver, I found that the eye height of 2.4mm SMA "J31" and "J33" is about 60mV lower than "J68" and "J72".

The VOD setting value is 31. The test pattern is PRBS7.

Then, I checked all the 2.4mm SMA high speed signal, I found that all the 2.4mm SMA connected to bank 1G are about 60mV lower than 2.4mm SMA which are connected to bank 1F in eye diagram.

What is the reason that leads to the different performance between bank 1G and bank 1F?

1. SMA to bank 1G has longer PCB routing than SAM to bank 1F?

2. Bank 1G has 4 channel transceiver running, while bank 1F only has 2 channel. So, bank 1G has more current loading than bank 1F. Thus cause lower lower eye height ?

3. Other reason, ? Please help.

 

Thank you.

 

Brs,

Leon

 

 

0 Kudos
1 Solution
CheePin_C_Intel
Employee
183 Views

Hi Leon,


As I understand it, you have some inquiries related to the difference between output eye opening for one pair of SMAs vs another pair of SMAs. The VOD settings are the same for both channels. For your information, with the same VOD setting, the difference in the eye opening is generally due to the board setup ie longer routing which attenuate the signal strength. 


Please let me know if there is any concern. Thank you. 



Best regards,

Chee Pin



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3 Replies
CheePin_C_Intel
Employee
184 Views

Hi Leon,


As I understand it, you have some inquiries related to the difference between output eye opening for one pair of SMAs vs another pair of SMAs. The VOD settings are the same for both channels. For your information, with the same VOD setting, the difference in the eye opening is generally due to the board setup ie longer routing which attenuate the signal strength. 


Please let me know if there is any concern. Thank you. 



Best regards,

Chee Pin



View solution in original post

Fresh_Leon
New Contributor I
177 Views
CheePin_C_Intel
Employee
174 Views

Hi,


You are welcome.


I believe the initial inquiry has been addressed. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.



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