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Hello,
I'm using Intel Arria 10 SX development kit and trying to program .sof file with on-board USB-Blaster II but I get the following error message when programming progress reach to 85%:
"Error(209014): CONF_DONE pin failed to go high in device 1. Make sure all communication cables are securely connected, select a different device, check the power on the target system, or make sure all nCE pins are connected to GND. The Intel FPGA Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number."
Board is init from SD and it is working until the programming fail is given,
SD image: Arria 10 SoC GSRD
Switches:
(Default configuration)
- S1: OFF OFF OFF OFF
- S2: OFF OFF OFF OFF OFF OFF OFF OFF
- S3: OFF OFF ON ON ON OFF OFF OFF ( Intel Arria 10 SoC Development Kit User GuideTable 5-6: Table 5-6: SW3 Configuration for On-Board USB-Blaster II Mode)
- S4: OFF OFF OFF OFF
JTAG chain: TDI -- 10AS066N3F40 -- SOCVHPS -- 5M1270ZF324 -- TDO
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Hello,
Can you try the golden image provided from rocketboards? link : https://www.rocketboards.org/foswiki/Documentation/A10GSRDV1501UserManual?erpm_id=8657105_ts1708316084215
regards,
Farabi
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Board resource : https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/arria/10-sx.html
what is your board revision? Can check the serial number sticker attached to the board.
regards,
Farabi
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Hello @Farabi,
Board S/N: 10ASXSoC003581
The image I tried is the prebuilt Golden Image provided from rocketboard and specified in the Intel Arria 10 SoC Development kit User Guide.
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Hello @Farabi,
In the Arria SoC I have a Linux system working and I'm trying to program the .sof file over the 10AS066N3F40 device. Is that correct or should I program the SOCVHPS device? The Quartus project combines the programmable logic with the HPS system.
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Hello,
If you boot linux, you need to include the hardware design(FPGA image) as .rbf file (not .sof file) when you build the GSRD.
.sof file only if you want to load FPGA image only and not HPS.
You can follow the steps here : https://www.rocketboards.org/foswiki/Documentation/Arria10SoCGSRD
Please refer to topic : Compiling Hardware Design
regards,
Farabi
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We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you
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