Arria 10 SoC Dev Kit: Not able to run Intel FPGA AI Suite SoC Design Example

[RajanVaja]

I want to run "S2M Mode Demonstration Application" from Intel FPGA AI Suite Soc Design Example User Guide example on Arria 10 SoC Development Kit. I am using prebuilt images from $COREDLA_ROOT/demo/ed4/a10_soc_s2m/sd-card/coredla-image-arria10.wic. However, booting is stuck at U-boot SPL during DRAM initialization with below error:

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U-Boot SPL 2022.07 (Jan 06 2023 - 03:46:57 +0000)
FPGA: Checking FPGA configuration setting ...
FPGA: Start to program peripheral/full bitstream ...
FPGA: Early Release Succeeded.
FPGA: Checking FPGA configuration setting ...
FPGA: Start to program peripheral/full bitstream ...
FPGA: Early Release Succeeded.

U-Boot SPL 2022.07 (Jan 06 2023 - 03:46:57 +0000)
DDRCAL: Success
DDR: SDRAM size check failed!
### ERROR ### Please RESET the board ###

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I tried FPGA AI Suite 2023.2 and 2023.3.1 prebuilt images and observations are same. However, Image from https://releases.rocketboards.org/2023.09/gsrd/a10_gsrd/sdimage.tar.gz,  works fine. What could be reason S2M example prebuilt image is not booting?

Below is more information on Hardware setup:

- Model Name: DEV KIT DKSOC10AS066SE

- SW1: 1=>OFF, 2=>OFF, 3=>OFF, 4=>OFF

- SW2 : 1=>OFF, 2=>OFF, 3=> OFF, 4=>OFF, 5=> ON, 6=>ON, 7=>ON, 8=>ON

- SW3 : 1=>OFF, 2=>OFF, 3=> ON, 4=>ON, 5=> ON, 6=>OFF, 7=>OFF, 8=>OFF

 - Attached board top image

[khtan]

Hi Rajan,

As this is duplicated topic to another thread (https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Arria-10-SoC-Development-Kit-Not-able-to-run-Intel-FPGA-AI-Suite/m-p/1580838#M27050)

I will close this first.

Thanks

Regards

Kian