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Arria 10 SoC Development Kit - Access all pins via on board Max 5 FPGA

Altera_Forum
Honored Contributor II
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Hi, 

I am using Arria 10 SoC Development Kit (10AS066N3F40E2SG). 

There are few addotional fpgas on the board (Max5). Seems like these FPGAs works as a multiplexer to deliver signals from the periphery to the main FPGA(Arria10) and back as the Arria10 has not enough pins to access all the periphery instantly. 

There is a diagram that show how some of the periphery connected to the FPGA via Max5 (push buttons, leds, etc. - attached screen shot). 

But there are many signals that are going from the periphery to max5 without any explanation how to access them from the main FPGA. 

There are also many signlas going from the FPGA to max5, but again there is no any diagram with explanation how these signals are connected further/ between them.  

There are all the talkabout pins in the schematics of the board (page 35 : 5M2210 System Controller and page 36 - FPGAIO for DP_IOSDI_IO and FMC_3V3IO) rev.c. 

Of course, I can try to reprogram max5 as I want, but I dont think this is the way Altera design it.. 

Did someone faced that issue, and found how to access the all the periphery? 

 

Thanks in advance.
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Altera_Forum
Honored Contributor II
132 Views

Didn't find any solution, and unfortunately this system was not stable, switched to Xilinx.

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