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FPGA Evaluation and Development Kits
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Arria 10 SoC Development Kit - The function of FAHBP16 on Page 36

Honored Contributor II

I am using Arria 10 SoC Development Kit (10AS066N3F40E2SG). And try to use the FMC A port for connecting an extra testing board.  

In the schematic (a10_soc_devkit_03_31_2016), some ports connect between FMA A port(J29) and MAXV_FPGA_IO(U21) , then I can't find where they go, so I don't understand how to use them.  

Could someone help to explain the logic of following signal ports? Thanks 

FAHBP18(Page17, J29) => FAHBP18(Page 36, U21) => ? 

FAHBN18(Page17, J29) => FAHBN18(Page 36, U21) => ? 

FAHBP19(Page17, J29) => FAHBP19(Page 36, U21) => ? 

FAHBN19(Page17, J29) => FAHBN19(Page 36, U21) => ? 



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