Arria V SoC Transceivers

[Altera_Forum]

I am trying to bring up a transceiver project on the Arria V SoC development board and have thus far had no luck. I've tried to use a transceiver toolkit example project with new device and pin assignments for my board and while the transceiver link appears in the toolkit, it has status N/A and is red. I have tried to start a new project using the Custom transceiver phy with the same setup as the example project and cannot even find the transceiver path in the toolkit - it is not automatically linked as all guides are saying it should be.  

 How do I access the transceivers from the Transceiver toolkit to verify they are working??

[Altera_Forum]

Update: 

I gave up on the transceiver toolkit, but am now watching the signals in SignalTap. Using a basic reference design for the Custom Phy, I am able to see both tx_ready and rx_ready are a logic 1. However, this is using the GIGE protocol at around 1 Gbps and utilizes a different reference clock than the one I want to use. If I try to change the protocol, data width, or reference clock frequency, rx_ready is never set. Has anyone seen this before or have any insight into something to try?