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In Arria10 GX FPGA development kit, the pins with "1.4V PCML" IO were changed to "High Speed Differential I/O" when revised from ES to production. Does it mean only the production version development kit can support up to 1.8V? Or is it just an document mismatch for the ES version?
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Hi,
Engineering sample (ES) silicon is early release of product where the product spec is still subject to changes. Only Production version product comes with finalized spec.
You can refer to Arria 10 datasheet to confirm on the supported spec.
- https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_datasheet.pdf
- I can see from history change log that 1.4V PCML is no longer supported and have been removed from datasheet spec
Does it mean only the production version development kit can
support up to 1.8V ?
- Sorry but I don't understand your question about 1.8V here.
- 1.8V is referring to what spec here and apply to which FPGA power rail ?
Thanks.
Regards,
dlim
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HI,
I don't hear back further from you.
I hope my earlier explanation has clear your doubt.
For now, I am setting this case to closure.
Feel free to file new forum post if you still have question in future.
Thanks.
Regards,
dlim
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