Hi all, I just commented on a three years old thread regarding this so I figured i'd start my own thread instead of waiting for it to become alive again. (didn't look before gravedigging, sorry)
Anyway, Arrow Europe has the simple MDDR core on their site, which I finally today noticed. I can instantiate it in qsys easy enough with the pdf instructions, but when editing the tcl file I run in to problems.
There's the
# set the top level pin name
part which I modified to look like this
set pin(ext_clk) clk_clk
set mddrPin(A0) mddr_a[0]
This was simple enough, however later on there's
set mddrPin(D0) mddr_dq_i[0]
and
set mddrPin(LDQS) mddr_ldqs_i
set mddrPin(UDQS) mddr_udqs_i
Both the d ram bank and ldqs and udqs have both input and output possibilities in the pin assignment editor from where I copied the top level pin names. I can't figure out which on is meant to be output and which one an input. So the above could both be set mddrPin(LDQS) mddr_ldqs_i
set mddrPin(UDQS) mddr_udqs_i
or
set mddrPin(LDQS) mddr_ldqs_o
set mddrPin(UDQS) mddr_udqs_o
the o at the end standing for output.
Any help is appreciated, thank you.
