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Altera_Forum
Honored Contributor I
808 Views

BITEC HSMC DVI I/O I2C Confirmation needed.

Hi, 

 

I am using the Bitec DVI HSMC Card for display purposes. I went through the schematics(Please find the attachment) and found that the I2C signals HSMC_SDA and HSMC_SCL are not connected to the TFP410 DVI Tx device but rather connected only to the EEPROM(AT24C04) device. So I would presume that the only way to control the data is by reading or writing to the control pins exposed in the device (ISEL,BSEL,EDGE,DKEN).  

 

Could anybody confirm whether my assesment is correct ? :confused: My target board is CYCLONE III EPC120 device. 

 

Thank you
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6 Replies
Altera_Forum
Honored Contributor I
64 Views

Hi , 

 

I am working with the same cyclone iii board and hsmc digital board from bitec. I have been able to gennerate DVI output by interfacing the CVI and CVO with Nios II processor and using control signal to read and write the registers of CVI and CVO with I2c open core.  

Although I have not faced any problem till now I think your concern is genuine and I dont have an answer to it.
Altera_Forum
Honored Contributor I
64 Views

Hi sneha, 

 

Thanks for the confirmation. Could you please tell me whether the config I am using on the pins is right/You have used the same thing ? 

 

\PD is set to '1' 

ISEL is set to '1' 

CTL1 is set to '0' 

CTL2 is set to '0' 

CTL3 is set to '0' 

 

 

And could you please let me know any other constraints you used in the .qsf file and .sdc file ?
Altera_Forum
Honored Contributor I
64 Views

TO_BE_DONE

Altera_Forum
Honored Contributor I
64 Views

Hi Sneha, 

 

Thanks for putting up the SDC file. I rectified a fundamental mistake I had made in not going through the Schematics properly. I am now able to establish communication. I am sending the I2C signals through the OUT_DVI_DAT and OUT_DVI_CLK ports marked in the schematics. The DVI Tx IC is configured through these ports. I had made the mistake of assuming that all I2C slave devices are configured through HSMC_SDA and HSMC_SCL ports just by changing the Device Addresses. However that is not the case. 

 

Hi needed confirmation on one more thing - are you using a DVI monitor for display or a VGA monitor ? Because I dont see any DAC in the loop which might suggest it only drives a DVI monitor.
Altera_Forum
Honored Contributor I
64 Views

I am using DVI monitor. I think it will not work with a vga monitor. Although if you have a graphics card you can change the size of image you want. That is how I have been testing it. But working with 1920x1080 size is not a good idea in cyclone iii I think as it has very less memory to buffer a high quality image. I have been able to get the op with DVI in and out with buffering to external memory but not with the image processing components of vip suite. I am facing serious fifo underflow problems in CVO. If you have any sucess with it do let me know? 

 

Sneha
Altera_Forum
Honored Contributor I
64 Views

I think that you must review your design, you can find more information here (http://www.fpga4fun.com/fpgainfo7.html)

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