Bank 5A can't be assigned to 1.8V level

[TGao]

Dear Sir/Madam,

Quartus:16.1

FPGA :5CGXFC3B7F23C8N

DDR3:MT41k5|2M16

Q: DDR3 is assigned to bank 7A/8A(1.35V), But I can't ​ assign 1.8V or 3.3V to bank 5A except 1.35V , Could you help me

the pin assignment is attached.

Ted

[BoonT_Intel · Accepted solution]

Hi Sir, can you attach the Quartus QAR file so that I can look clearer. With only the QSF I am unable to check those pin that not assigned, so Quartus will auto assign it and maybe will assign it into bank 5A and cause the conflict.

So, please attach QAR file for me to check, or check is there any IO with IO standard SSTL135 that do not have user location assignment in QSF.

[TGao]

Hi BoonT，

Solved， Thanks

Ted​

[BoonT_Intel]

Hi Ted,

Glad to hear it solved. Can you share a little bit what is the actual reason of the error? Is it a SSTL135 IO that does not has location assignment and auto assign to bank 5A?

[TGao]

HI BoonT，

Yes，U're right，An address line is assigned to band 5A.

Ted.Gao​

[BoonT_Intel]

Hi Ted,

Thanks for sharing. 谢谢你 😉

[TGao]

😁 😁 😁

[BoonT_Intel]

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