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rrao1
Beginner
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BayTrail SoC - PUnit writes

Bay Trail -I SoC which has 30679 D0 Stepping Processor 

Microcode Versions tried 

 

 M0F30679_90A 

 M0130679_903 

 

MSR 79 – writes microcode to SoC (Passed) 

MSR 8b – Reads microcode revision (Passed)

 

Hang at below code

 

; For A-step, bits 0 and 1 need to be set after patch load and before MRC (first possible reset)

;Without setting BIOS_RESET_DONE on A0, Bios will stuck at vlvdxe after GT PowerManagement

 ; Could be done later in flow for B-step, but no need to move and have it in 2 places.

 ;

;Program BIOS_RESET_DONE (bit0) and BIOS_ALL_DONE (bit1) in PUNIT.BIOS_RESET_CPL, Port 0x4, Offset 0x5

;BIOS_ALL_DONE is newly added bit for B0.

 

 

mov   edx, 0CF8h    ;config MCD 

mov   eax, 800000d4h 

out   dx, eax 

mov   edx, 0CFCh    ;set Bit0 and Bit1 

mov   eax, 3 

out   dx, eax 

  

mov   edx, 0CF8h    ;config MCR 

mov   eax, 800000d0h 

out   dx, eax 

  

mov   edx, 0CFCh    ;write_opcode+portID+offset 

mov   eax, 007040510h 

out   dx, eax  

 

why there is a Hang at this register write? when i remove this code , boot goes ahead and hangs at GT Power Management.when i disable both, Graphics does not come up

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1 Reply
Nooraini_Y_Intel
Employee
70 Views

Hi rrao1,

 

I think you have posted this thread into the wrong community forum. This forum only covers Intel FPGA product. Our agents can only help to provide assistance with regards to FPGA product. Please post your question to the correct Intel Community forum from the link below: 

https://communities.intel.com/community/tech

 

Thank you.

 

Regards,

Nooraini

 

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