Hello,I'm using the 'original' Bemicro kit (not the SDK kit) for a simple project implemented with a state machine in VHDL, so no Nios and no SOPC builder I've never used those. I've been using Quartus II 9.1sp2. This Bemicro kit uses a Cyclone III and comes without a configuration device for storing a design after power down, but allows you to mount a config. device (EPCS16) and perform a simple cut/jumper to implement Active Serial programming. (what the cut/jumper does is set the MSEL[2..0] lines from '000' to '010'). I've checked continuity with things along with looking at the configuration documentation and the hardware looks correct to me. I am able to use JTAG mode to program the cyclone III, however I cannot detect the EPCS16. Thru many hours of searching, I'm thinking my problem may(??) lie with implementing - or I should say lack of implementing - a configuration controller in my Quartus design??? On these forums I once ran across a thread where someone mentioned (had a picture showing) instantiating 4 simple i/o ports (?) with, if I remember correctly, data0, data1, dclk, &nce. All they mentioned/showed were those 4 ports. I also found an old Altera app note describing changing these 'dual purpose pins' to regular i/o in teh assignment editor and then connecting data0, data1, dclk, &nce to the "epcs configuration controller". I have not been able to find an "epcs configuration controller" anywhere in the libraries, but did find a 'altserial_flash_loader'. I tried compiling the design without implementing the 'altserial_flash_loader', just the i/o ports, and it compiled the design just fine. I could program with JTAG, but I could never detect the EPCS16. I tried again with the 'altserial_flash_loader', connecting the 4 lines mentioned above, but ther are additional line on the 'altserial_flash_loader' which apparently need to be connected and it won't compile. Thru my hours of searching, I also noted comments on having to prpgram the CycloneII device with JTAG (I assume to implement the EPCS controller) before being able to detect/program the SPCS device. I tried this in my version without the 'altserial_flash_loader' to no avail (still couldn't see the EPCS16). Any help with what I need to do to get this going would be greatly appreciated. I'm pulling my hair out at this point and there's not much left for that... :)
There are two simple ways to load the SFL IP to your FPGA to access the serial flash through indirect JTAG programming.- load the default factory image shipped with Quartus sfl_ep3c16.sof - instantiate the SFL IP in your design after generating the code in MegaWizard
sfl_inst : sfl PORT MAP ( noe_in => '0' );You additionally need to convert the configuration stream to *.jic with the Quartus conversion tool.
Thanks FvM. For some reason I started to get fatal errors (i.e. Quartus would crash) using SP2, so I did a bunch of un-installing and re-installing, trial and error, and settled on 9.1 with no service packs. I was then at the point where I could compile wiht no issues and program thru JTAG, but not still not see the EPCS.I instantiated the SFL thru the Megawizard and was given the choice to disable the ASMI features, and in doing so resulted in a top level block with just the noe_in input. I tied this low, tried to compile and got an error about the programming pins being used twice (yeah!) so deleted those io ports I had added, recompiled and viola! I converted the .sof to a .jif, programmed the cycloneIII first using the .sof, then auto-detected the chain and low and behold it saw the EPCS(!), so added the appropriate programming files, reprogrammed, and am now able to boot form the EPCS device. I read thru a bunch of Altera documents as well as did hours of searching on teh web. Is this documented anywhere? Thanks again!!!
I'm using the indirect JTAG programming option since many years, so I didn't watch out for the recent documentation. But I think an 370 using the serial flashloader with the quartus ii software is the suggested reading.