Hi everybody;I'm new in Altera development. I need a help for getting the Bitec HSMC Digital video working on Altera Cylone III dev board. I have the reference design supplied by bitec but when I download the j8.sof to the board, I get 640x480 60 Hz in my screen with colored vertical bars. I need some help to get this program working. Thank you Rabia
Rabia,It would be handy if you could give some more info on the example you used, because it could be that it is doing all it's supposed to do (there are some examples that just generate a test pattern to test the outputs). You can always check in the SOPC builder of the project what the main configuration is. It's also there that you can change the resolution etc. On the following website you can watch some free online training courses which should help you get started with the Quartus II software: http://www.altera.com/education/training/curriculum/fpga/trn-fpga.html Anymore questions, ask them, I'll try to help (for I am not a specialist myself...;) ) Best, Hans
Hi ,thank you for the answer. I used the "DVI 1080P Loop-through C120 (Beta)" found in the website of bitec: http://www.bitec.ltd.uk/hsmc_dvi.html I have en entry from blueray console, and out my LCD HD screen. thank you for your help. Rabia
Hey Rabia,I read the documents of the example, and it never mentions a test pattern generator... It should just give the same DVI signals on its output pins as on its input DVI port (to show tripple buffering with the DDR2). I have the Cyclone III Nios II development kit so I can not try the example myself, can you post a picture of the SOPC system from this project? Best, Hans
Rabia,I must be honest, I need to be able to experiment with this board myself to help you more, because I work on a different board and I still concider myself as a newbee :rolleyes: . What I suggest in your case is that you try from scratch to build a test pattern generator. Then you have an output only system (so you can check that part), and then later on I would expand this system with memory, inputs,... Because that last step really complicates the SOPC system and timing requirements... Hope you see some light at the end of the tunnel... :confused: Best and good luck!!