Building uboot for cyclone V SoC

[snehal_p]

Hello,

We want to build boot image for customized cyclone V SoC board.

We are following the below document, using Quartus Prime 22.1 Standard Edition on Ubuntu 20.04 system,

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10#Appendix_45_Building_Linux_Binaries

We are getting below error while building uboot

/usr/bin/ld: tools/imagetool.o: in function `imagetool_get_type':
imagetool.c:(.text+0xa): undefined reference to `__stop_image_type'
/usr/bin/ld: imagetool.c:(.text+0x12): undefined reference to `__start_image_type'
/usr/bin/ld: tools/imagetool.o: in function `imagetool_verify_print_header':
imagetool.c:(.text+0x73): undefined reference to `__stop_image_type'
/usr/bin/ld: imagetool.c:(.text+0x7a): undefined reference to `__start_image_type'
collect2: error: ld returned 1 exit status
make[1]: *** [scripts/Makefile.host:104: tools/dumpimage] Error 1
make: *** [Makefile:1900: tools] Error 2

Can you please share your insights.

Thanks,

snehal_p

[snehal_p]

Hello Jingyang Teh,

Can you please share pointers regarding dts file generation for customized board using Quartus Prime 22.1 Standard version tool.

Thanks,

snehal_p

[JingyangTeh_Altera]

Hi

The sopc2dts tool have been discontinued.

Currently, all device tree example are created and stored in the uboot branch and linux branch (arch/arm/dts/socfpga_cyclone5_socdk.dts).

It is advisable to make changes to the devkit device tree.

Are you using 2 different UART baudrate for the linux and uboot?

Can you share me both linux and ubiit device tree to me?

Regards

Jingyang, Teh

[snehal_p]

Hello,

1) Are you using 2 different UART baudrate for the linux and uboot?

-- during built can we select baudrate, PFA uboot and device tree

2) Following the steps https://www.rocketboards.org/foswiki/Documentation/HOWTOCreateADevicetreeForCycloneVSoC, we could generate a dts file for customized board but facing issue while generating a dtb file. Below is the error message

DTC     arch/arm/boot/dts/my_cv_fpga_overlay.dtb

Error: arch/arm/boot/dts/my_cv_fpga_overlay.dts:50.10-11 syntax error

FATAL ERROR: Unable to parse input tree

make[1]: *** [scripts/Makefile.lib:351: arch/arm/boot/dts/my_cv_fpga_overlay.dtb] Error 1

make: *** [Makefile:1403: my_cv_fpga_overlay.dtb] Error 2

PFA header and dts file generated, as per our observation dts is not being updated wrt to header file generated..

Can you please share the pointers.  

Thanks and regards,

snehal_p

[JingyangTeh_Altera]

Hi

In the new flow the sopc2dts generator have been discontinued and should no be used.

You will have to make the changes base on the devkit device tree located in the location :

https://github.com/altera-fpga/u-boot-socfpga/blob/c13fb267004c4c79d3573360f033f4a32e8a3c79/arch/arm/dts/socfpga_cyclone5_socdk.dts#L4

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

Do you have any more follow up question on this issue?

Regards

Jingyang,Teh

[snehal_p]

Hello,

We are currently working with Quartus Prime Standard Edition v22.1 and have noticed that it no longer includes the embedded_command_shell file, which was previously available in earlier versions as part of the SoC-EDS. This shell was essential for launching tools like bsp-editor and mkpimage used to generate the preloader for the Cyclone V SoC.

While following the "Building Bootloader for Cyclone V and Arria 10" guide, I am able to successfully boot the HPS and access all its peripherals. However, the FPGA does not get configured - only the HPS boots correctly, and the FPGA remains unconfigured, even when using an updated .rbf file.

Interestingly, this issue does not occur when using Quartus v18.1 - in that version, both the HPS and FPGA configure as expected. This suggests that something may have changed or is missing in the newer version's flow.

Could you please advise if there is a new procedure or an additional step required in v22.1 to ensure the FPGA bitstream is loaded properly during boot?

Looking forward to your guidance on resolving this issue.

Thanks,

snehal_p

[JingyangTeh_Altera]

Hi

Since there are no feedback for this case, I shall set this case to close pending. If you still need further assistance, you are welcome reopen this case within 20days or open a new case, someone will be right with you.

If you happened to close this case you will receive a survey. If you think you would rank your support experience less than 4 out of 5, please allow me to correct it before closing or if the problem can’t be corrected, please let me know the cause so that I may improve your future service experience.

Regards

Jingyang

[KennyTan_Altera]

Case reopening.

[KennyTan_Altera]

case reopening

[JingyangTeh_Altera · Accepted solution]

Hi Snehal

Just to update the forum case.

The missing steps from the RBO page are the steps below:

1.Step to convert the sof to rbf. You could use the command below to convert the sof.

quartus_cpf -c -o bitstream_compression=on soc_system.sof soc_system.rbf

2.Missing u-boot.scr could be gotten from the gsrd page.

https://releases.rocketboards.org/2025.03/gsrd/c5_gsrd/u-boot.scr

3.Place both rbf and the u-boot.scr in the sdcard partition 1 (sdfs)

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Regards

Jingyang, Teh