I would like to have a common clock between two Arria10 FPGA boards. I would like to use the SMA_CLK_OUT to drive the CLKIN_SMA on the other board, and set the CLK_SEL to use this clock. However, the SMA_CLK_OUT is 1.8V and the CLKIN_SMA currently is 2.5V. Do I have to move L9 to L8 to modify U42 from a 2.5V to a 1.8V part? Why is this not configurable on the board?