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"Stratix 10GX L_H_Tile_XCVR_PHY IP" uses ATX PLL for PCIE GEN3 speed. Maximum output frequency of ATX PLL is 8.7 GHz and PCIE GEN3 rate. Due to less margin between max output frequency of ATX PLL and PCIE serial rate, having doubt if lowest speed grade transceiver can support PCIE Gen3 rate.
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Hi Sir,
yes lowest transceiver speed grade also can meet the Gen3 requirement. For PCIe, the bottleneck is come from fabric speed grade but not transceiver speed grade.
Refer to table 4 of the recommended fabric speed grade for specific PCIe settings.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/archives/ug-s10-pcie-avst-17.1ir1.pdf#page=9
Hope this helps.
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