- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi everybody, thank you for your answer about the HSMC debug header. Now, i would like to use on my cyclone III development board, the SRAM memories. I know i have to use an interface and i would like to know if there is already one created? Or if i have to create it? Because i am not sure, the interface supplied with Sopc builder is good. Is altera created one? Thank you .
Link Copied
1 Reply
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
An SRAM doesn't require a "controller", only wires and proper latencies.

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page