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Can you provide details of the MAX 10 neutron induced SEE vulnerabilities?

JDIAZ28
Beginner
1,243 Views

The Single Event Effects page does not cover the MAX 10 FPGA family. The product overview and datasheet do not mention any SEU performance or vulnerabilities. Is there neutron induced SEE data on the MAX 10 FPGA?

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JohnT_Intel
Employee
1,037 Views

We do not have SEE data for MAX 10 device. we only performed SEU testing.

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JDIAZ28
Beginner
1,037 Views
Hi, Can you please share the SEU data for the MAX 10 devices? Has the MAX 10 been tested for Single event latchup or single event functional interrupt?
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JohnT_Intel
Employee
1,037 Views

Hi,

 

The SEU data will be based on your Quartus design. You will need to enable the SEU in your Quartus design and you will be able to check the SEU FIT report. Please refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an866.pdf for more information

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Nick_CA
Beginner
643 Views

Dear @John ,

Sorry for reviving this thread. I was trying to get more info from the Hotline without luck.
I would like to review the FIT of the MAX10 without generating a design in Quartus.

Could you please provide the underlying data for ADC, CRAM, FF and BRAM? Or forward me a contact?

Thanks and Best Regards
Nick

 

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