FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5288 Discussions

Clock Location in Stratix II GX????????

Altera_Forum
Honored Contributor II
814 Views

I am using stratix II gx EP2SGX90FF1508 board to my project its on very high speed serial communication. 

Before going to dump the main project code i thought of becoming familiar with the kit,,,,, 

So thought of implementing a counter on the board, 

I have done with the simulating the counter code and is working fine in simulation.... 

But when i went to implement on the board I gave the user led location as the output location so that I can check if the led will blink or not??? 

 

Actually I am confused with the location of the Clock in the design ,,,,,,i saw many differential clocks....but couldn't able to decide which one should be used for single ended clock design...... 

 

 

So I request any of the altera guys to tell me where can i find the locations of the clocks ...... and how it can be configured for different frequencies.... 

 

Also i tried with the signal tap II analyser to check the functionality of the counter ,it didn't worked for me ,,,, 

I needed a good user guide which can explain me the steps in the Signal tap II logic analyser ,,,, 

any one can provide me the link guys please,,,,,,, 

 

 

It will be very much helpful for me if any one replies with good answer........................
0 Kudos
0 Replies
Reply